Comments on: Berkeley Lab Opens Bidding For Future NERSC-10 Exascale System

By: Paul Berry

Paul Berry — Mon, 24 Apr 2023 12:35:52 +0000

In reply to Adel Azmeh. Given that they are already very successful in selling their chips in big HPC rigs, the question is how much more successful they would be if they were the prime contractor - a role outside their existing competencies, and one that does not typically result in amazing profit margins.

By: Art Scott

Art Scott — Sat, 22 Apr 2023 17:43:02 +0000

https://medium.com/@art_87634/open-standard-for-earth-health-monitor-version-2023-04-22-b7d92ab85c6c
Open Standard for “Earth Health Monitor ™”, version 2023.04.22
Earth Day 2023
Just published: US Patent Application on “Oscillator for Adiabatic Computational Circuitry.” This sort of thing will be essential for moving beyond the thermal barriers that otherwise threaten to soon halt improvements in digital energy efficiency. https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20230114017

By: Adel Azmeh

Adel Azmeh — Sat, 22 Apr 2023 08:28:54 +0000

Interesting article. I am surprised that AMD might not want to compete in the bidding with HPE. Their recent impressive success in supercomputer deals enabled them to get financing for their research for MI200 and the forthcoming MI300 at the time when they had little resources. Their gross margins were probably not very high but they got tremendous knowledge in performance and power efficiency at making working together CPU and GPU. The MI300 is the child of this cooperation. However with AMD making more money and being highly profitable they may believe they don’t needs these « grants ». We will see but I think that Lisa Sue is aware that these deals improved materially AMD image as a leader in supercomputing and also being a company that can deliver on its promises.

By: Hubert

Hubert — Thu, 20 Apr 2023 06:23:37 +0000

In reply to Paul Berry. I like the idea of bringing Atos to the mix (eg. through Lockheed/Martin) ... maybe even Fujitsu(?).

By: peter j connell

peter j connell — Wed, 19 Apr 2023 08:27:08 +0000

GPU chip sizes have long been at the boundary of what is practical to fab.

Only very recently have we at long last seen AMD introduce elements of their chiplet architecture to GPUs.

I predict major advances from this.

By: Timothy Prickett Morgan

Timothy Prickett Morgan — Tue, 18 Apr 2023 22:48:59 +0000

In reply to Paul Berry. I think you are right. Good point. Not sure if Granite Rapids or Diamond Rapids will have HBM, but it will have something like it if not HBM4. And I agree, HPC customers need it. They need 10X the bandwidth than even that provides. Someday, we will slow down processors and fatten up memory and get this back into whack.....

By: Paul Berry

Paul Berry — Tue, 18 Apr 2023 22:05:02 +0000

Your back of the envelope math works for the GPU part of the machine, but they probably also want 10x on the CPU-only applications. I doubt we’re going to see the same ratio of performance improvement for CPU sockets as we will for GPUs. The only thing I can think that would support that is on-package cache and HBM plus another doubling or more of cores per socket. Otherwise you might just need a lot more cabinets full of cores to get that level of improvement.

What about one of the big defense contractors as the prime contractor? If Lockheed/Martin can bid airbus to the airforce, maybe they can bid Atos to DOE.